High Speed IO using Xilinx Aurora

Abstract: A VHDL evaluation platform and interface to the Xilinx Aurora 8b/10b IP has been designed, tested and evaluated. The evaluation platform takes an arbitrary amount of data sources and sends the data over 1,2,4 or 8 multi gigabit serial lanes, using the Aurora 8b/10b protocol. A lightweight communications protocol for point-to-point data transfer, error detection and recovery is used to maintain a reliable and efficient transmission scheme. Priority between sources sharing the serial link is also a part of the platform. The Aurora 8b/10b IP is a lightweight protocol and transceiver interface for Xilinx FPGAs, based on the 8b/10b line encoding protocol. In addition, a demonstration PCB has been developed to introduce the Kintex-7 FPGA to future products at SAAB Dynamics.