Fabrication and Charaterisation of Finger Gates

Abstract: In this thesis were vertical NWFETs (nanowire field-effect transistors) fabricated, and their electrical properties characterised. The main goal was to minimize the parasitic capacitances that limited the high frequency performance. The nanowires consisted of InAs/InGaAs heterojunctions, and were grown on top of Si via a buffer layer. The gate contained a finger pattern that was defined via EBL (electron beam lithography). The width-, and amount of fingers was varied to find the optimal design. A secondary goal was to investigate the usage of HSQ (hydrogen silsesquioxane) as separation material between contacts, and to determine its dielectric constant. This was done by correlating the gate-source capacitance to the thickness of the HSQ. To do this were CV-measurements conducted, using a probe station and an impedance analyzer. The method also confirmed a voltage dependence, originating from depleted regions in the semiconductor nanowire, and from trapped states in the gate oxide. The project was limited to optimization of gate-, and source parameters only. Hence the fabrication of drain contacts was left out.