Essays about: "CHIP 2007"
Showing result 11 - 15 of 18 essays containing the words CHIP 2007.
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11. Physical Planning of ASIC’s in mobile systems
University essay from Institutionen för systemteknikAbstract : With increasing demands in terms of timing, area and power, today’s ASIC (Application Specific Integrated Circuit) designers are faced with new problems as technology emerges. Ericsson has started to work in 65 nm and realized that the methods used in previous, larger technologies, does not offer good enough correlation between synthesis and the results after physical placement. READ MORE
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12. Functional Self-Test of DSP cores in a SOC
University essay from KTH/Mikroelektronik och Informationsteknik, IMITAbstract : The rapid progress made in integrating enormous numbers of transistors on a single chip is making it possible for hardware designers to implement more complex hardware architectures in their designs. Nowadays digital telecommunication systems are implementing several forms of SOC (System-On-Chip) structures. READ MORE
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13. Modifying Polydimethylsiloxane (PDMS) surfaces
University essay from Institutionen för biologi och kemiteknikAbstract : The aim of the project was to modify polydimethylsiloxane (PDMS) surfaces in order to minimize adsorption of proteins. PDMS is used in micro-fluidic devices that control the delivery of samples to a sensor chip in Biacore instrumentation. READ MORE
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14. Current Distribution in High RF Power Transistors
University essay from Ämnesavdelningen för elektronikAbstract : To obtain the power levels required from high RF power transistors, the size of the chip has often to be made so large that inductance of electrical connections inside the package cannot be neglected. This may have the effect that various parts of the transistor chip are not connected exactly parallel, i.e. READ MORE
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15. Micro-Network Processor : A Processor Architecture for Implementing NoC Routers
University essay from JTH, Data- och elektroteknikAbstract : Routers are probably the most important component of a NoC, as the performance of the whole network is driven by the routers’ performance. Cost for the whole network in terms of area will also be minimised if the router design is kept small. READ MORE