Essays about: "Coarse Grain Reconfigurable Hardware"

Showing result 1 - 5 of 6 essays containing the words Coarse Grain Reconfigurable Hardware.

  1. 1. Acoarse grain reconfigurable memory architecture for linear algebra and deep neural networks

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Cyril Armand Koenig; [2022]
    Keywords : ;

    Abstract : Companies and institutions around the world have been working to develop machines with always more computing power. This race has now found its new objective: hexascale computing (with 1018 flops machines). READ MORE

  3. 2. Low Density Parity Check Encoder and Decoder on SiLago Coarse Grain Reconfigurable Architecture

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Weijiang Kong; [2019]
    Keywords : LDPC; CGRA; Reconfigurable architecture; VLSI design; ASIC; LDPC; CGRA; Konfigurerbar arkitektur; VLSI design; ASIC;

    Abstract : Low density parity check (LDPC) code is an error correction code that has been widely adopted as an optional error correcting operation in most of today’s communication protocols. Current design of ASIC or FPGA based LDPC accelerators can reach Gbit/s data rate. READ MORE

  4. 3. Implementation of 3GPP LTE QPP Interleaver for SiLago

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Spandan Dey; [2019]
    Keywords : Quadratic Permutation Polynomial; QPP; interleaver; SiLago; Address Generation Unit; AGU; 3GPP; LTE; turbo codes; parallel; Quadratic Permutation Polynomial; QPP; interleaver; SiLago; Address Generation Unit; AGU; 3GPP; LTE; turbo codes; parallel;

    Abstract : Modern wireless communication systems have seen an increased usage of various channel coding techniques to facilitate improved throughput and latency. Interleavers form an integral part of these coding techniques and play a critical role by making the communication more robust and resilient to noise and other interference. READ MORE

  5. 4. Hardware accelerator for SOM based DNA sequencing Algorithm

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Prashant Sharma; [2018]
    Keywords : ;

    Abstract : The prevalent experience based diagnosis of health problem are often incorrect. Different aspect of this problem are microorganism’s adaptation of antibiotics and effectiveness of the generic medicines on each individual etc. The DNA sequencing based diagnosis is evolving to deal with this problem. READ MORE

  6. 5. An Improved Hierarchical Design Flow for Coarse Grain Regular Fabrics

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Nasim Farahini; [2011]
    Keywords : ;

    Abstract : This project included two parts. First, a reconfigurable cell was designed as the DataPath Unit (DPU) of a Dynamically Reconfigurable Resource Array (DRRA). In this cell, hardware resources were shared to be reused in different configurations. Consequently, the area was reduced by 68% in comparison with the previous DPU with the same functionality. READ MORE