Essays about: "Fpga"
Showing result 36 - 40 of 431 essays containing the word Fpga.
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36. FPGA implementation of an sEMG classifier
University essay from Lunds universitet/Avdelningen för Biomedicinsk teknikAbstract : This master’s thesis discusses the implementation of a convolutional neural network on a Field Programmable Gate Array (FPGA). It deals with implementation be describing a tool chain, starting with the designing of a model in Keras, transforming the model to Hardware Descriptive Language, and finally implementing it on an FPGA. READ MORE
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37. Digital Microwave Control of Superconducting Qubits
University essay from KTH/Tillämpad fysikAbstract : We manipulate two superconducting qubits using digital microwave electronics. Starting fromtheir characterization, we develop a real-time reset scheme and implement the iSwap gate. Thequbits’ parameters are obtained using standard single-qubit characterization techniques, such asRabi and Ramsey oscillations and frequency sweep of the resonators. READ MORE
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38. Closed-loop control and data- recording of a modular-multilevel converter (MMC)
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Modular multilevel converters (MMCs) are the preferred converter solution in flexible ac transmission systems (FACTS) and high-voltage direct current (HVDC) applications. This is due to the high quality of the voltage and current signals, lower overall losses, and fewer problems with switching-related EMI. READ MORE
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39. Design and implementation of a new PCB daughterboard for KTH’s FPGA based courses
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : This project focused on creating a PCB prototype to work with KTH's newly purchased FPGAs. This PCB is meant to be used to expand the FPGA's IO, as it did not have enough LEDs or switches to be used in some courses at the Embedded Systems program at KTH. READ MORE
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40. Modularity, Scalability, Reusability, Configurability, and Interoperability of ASIC/FPGA Verification IP
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : The complexity of chip design has been exponentially rising, resulting in increased complexity and costs in chip verification. This rise in complexity results in increased time to market and increases risks of chip in fabrication, that can be catastrophic and result in major losses. READ MORE