VHDL Implementation of Flexible Frequency-Band Reallocation (FFBR) Network
In digital communication systems, satellites give us world wide services. These satellites should effectively use the available bounded frequency spectrum and, therefore, to carry out flexible frequency-band reallocation (FFBR), on-board signal processing implementation on FFBR network is needed. In the future, to design desired dynamic communication systems, very flexible digital signal processing structures will be needed. The hardware, in the system, shall not be changed as simple changes in the software will be made.
The purpose of this thesis is to implement an N-channel FFBR network, where N=20. A 20-channel FFBR network consists of different blocks, e.g., DFT, IDFT, complex multipliers, input/output commutators and polyphase components.
The whole 20-channel FFBR network will be implemented in VHDL. In a 20-channel FFBR network, it is a 20-point FFT/IFFT required. This 20-point FFT/IFFT is built by a combination of radix-4 and radix-5 butterflies. The Cooley-Tukey FFT algorithm is chosen to build the 20-point FFT/IFFT. The main aim is to build 20-point FFT/IFFT. There are 20 complex multipliers before the IFFT block and 20 complex multipliers after the IFFT block. In the same way, 20 complex multipliers are used before the FFT block and 20 complex multipliers are used after the FFT block. At the input/output to this FFBR network, 20 FIR filters (polyphase components) are used, respectively.
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