AC Gate Bias Stress of 4H-SiC MOSFETs : An investigation into threshold voltage instability of SiC Power MOSFETs under the influence of bipolar gate stress
Abstract: Silicon Carbide, a wide band gap (WBG) semiconductor, has pushed electrical limits beyond Silicon (Si) when it comes to power electronics. It has offered the electrification of society showing promise for a greener future. However, owing to higher material defects, particularly at the oxide/semiconductor interface, threshold voltage (VTH) instability has been a persistent problem. This thesis examines the drift in VTH when a bipolar ac gate bias stress is applied to 4H-SiC MOSFETs. For this purpose, a gate stress setup using a gate driver IC is created. This is followed by a measure-stress-measure (MSM) sequence at varying gate voltages to study the effects of VGS,on, VGS,off, and voltage overshoots on the drift. Two critical VGS,off biases are found. The drift is negligible until the first critical point, accelerated, between the first and second bias, and decelerated beyond the second point with degradation of the oxide. Overshoots/undershoots in the gate drive loop shows an excess drift of 37.77% with only undershoots contributing entirely to this percentage. Drift at higher temperature is smaller than at room temperature but with changing slope. After 400 hours of stress at +18/ − 8V, a VTH drift of 17.5% while a RDS,on drift of only 2.5 % is measured. End of life VTH for devices in this thesis show a drift of 280mV at the automotive application switching limit and 500mV at the solar applications switching limit. The findings are intended for better understanding of device performance limits at high switching cycles and voltage biases.
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