Digital Power Detector for WCDMA Transmitter

Abstract: A 3G mobile phone must have the ability to control its output power with high precision. A power detector is used to measure the actual power outputted by the power amplifier to the antenna. With higher data rates the traditional implementations with peak detectors have become very difficult to use, which is why true RMS detectors are needed. In this thesis the digital part of a true RMS detector for W-CDMA has been designed. The analog parts of the power detector form a quadrature demodulator that transforms the radio signal down to DC where it is occupies a band from 0 to 2 MHz. The measured power amplifier output signal is sampled at 1 MHz which prohibits direct calculation of the RMS voltage in the detector. Instead the detector uses the wave form generator output as a reference to determine the amplification in the transmitter chain which can then be used to find the output power (wave form generator output has constant known power). This requires time alignment of the two signals which is done using a least mean square method of correlation. Using the reference up-sampled to 104 MHz allows very good accuracy despite the low sample rate of the power amplifier signal. To overcome distortion in the power amplifier an additional distortion reducing algorithm has been developed. An estimate of the output power can be delivered after 100 μs and has a standard deviation of its error of 0.05 dB. The error from changing modulation type is limited to a maximum 0.04 dB, well below the specified 0.1 dB. The solution is accurate and modulation independent.