Essays about: "interleaved"

Showing result 16 - 20 of 28 essays containing the word interleaved.

1. 16. Efficient Implementation of 3D Finite Difference Schemes on Recent Processor Architectures

   University essay from KTH/Skolan för datavetenskap och kommunikation (CSC)

   Author : Frederick Ceder; [2015]
   Keywords : hpc; high performance computing; intel; haswell; xeon phi; knights corner; burgers equation; finite difference methods; fdm; ftcs; parallel programming; vectorization; simd;

   Abstract : Efficient Implementation of 3D Finite Difference Schemes on Recent Processors Abstract In this paper a solver is introduced that solves a problem set modelled by the Burgers equation using the finite difference method: forward in time and central in space. The solver is parallelized and optimized for Intel Xeon Phi 7120P as well as Intel Xeon E5-2699v3 processors to investigate differences in terms of performance between the two architectures. READ MORE

3. 17. Distortion Cancellation in Time Interleaved ADCs

   University essay from Linköpings universitet/Elektroniska Kretsar och System

   Author : Naga Thejus Sambasivan Mruthyunjaya; [2015]
   Keywords : Time-Interleaved ADC; Post correction; Blind calibration; Harmonics cancellation; Mismatch analysis; Linearisation;

   Abstract : Time-Interleaved Analog to Digital Converters (TI ADC) consist of several individual sub-converters operating at a lower sampling rate, working in parallel, and in a circular loop. Thereby, they are increasing the sampling rate without compromising on the resolution during conversion, at high sampling rates. READ MORE

4. 18. Digital compensation of nonidealities in time-interleaved ADCs

   University essay from KTH/Signalbehandling

   Author : Anders Haponen; [2014]
   Keywords : ;

   Abstract : Mismatches between the analog to digital converters (ADCs) in time-interleaved sampling causes spurious signals, limiting the performance of the architecture. This thesis introduces the most commonly modeled mismatches, analyses their e ects and reviews and evaluates state-of-the art compensation methods published in recent papers. READ MORE

5. 19. Design of a Rom-Less Direct Digital Frequency Synthesizer in 65nm CMOS Technology

   University essay from Elektroniska komponenter; Tekniska högskolan

   Author : Golnaz Ebrahimi Mehr; [2013]
   Keywords : Rom-Less DDFS; Current Steering Digital-to-Analog Converter; Interleaved DACs; Return-to-Zero; Sine weighted DAC;

   Abstract : A 4 bit, Rom-Less Direct Digital Frequency Synthesizer (DDFS) is designed in 65nm CMOS technology. Interleaving with Return-to-Zero (RTZ) technique is used to increase the output bandwidth and synthesized frequencies. The performance of the designed synthesizer is evaluated using Cadence Virtuoso design tool. With 3. READ MORE

6. 20. Live Demonstration of Mismatch Compensation for Time-Interleaved ADCs

   University essay from Elektroniksystem; Tekniska högskolan

   Author : Johan Nilsson; Mikael Rothin; [2012]
   Keywords : interleaving; analog-to-digital converter; digital communication; FPGA; analog video; carrier recovery; synchronization; RF modulation; SDR14;

   Abstract : The purpose of this thesis is to demonstrate the effects of mismatch errors that occur in time-interleaved analog-to-digital converters (TI-ADC) and how these are compensated for by proprietary methods from Signal Processing Devices Sweden AB. This will be demonstrated by two different implementations, both based on the combined digitizer/generator SDR14. READ MORE