Essays about: "memory controller"
Showing result 16 - 20 of 62 essays containing the words memory controller.
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16. Mitigation of inter-domain Policy Violations at Internet eXchange Points
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Economic incentives and the need to efficiently deliver Internet have led to the growth of Internet eXchange Points (IXPs), i.e., the interconnection networks through which a multitude of possibly competing network entities connect to each other with the goal of exchanging traffic. READ MORE
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17. Traffic Load Predictions Using Machine Learning : Scale your Appliances a priori
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Layer 4-7 network functions (NF), such as Firewall or NAPT, have traditionally been implemented in specialized hardware with little to no programmability and extensibility. The scientific community has focused on realizing this functionality in software running on commodity servers instead. Despite the many advancements over the years (e.g. READ MORE
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18. Efficient Multi-Core Implementation of the IPsec Encapsulating Security Payload Protocol for a Single Security Association
University essay from Linköpings universitet/Programvara och systemAbstract : As the mobile Internet traffic increases, the workload of the base stations processing this traffic increases with it. To cope with this, the telecommunication providers responsible for the systems deployed in these base stations have looked to parallelism. READ MORE
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19. CONTROLLING CACHE PARTITIONSIZES TO INCREASE APPLICATIONRELIABILITY
University essay from Mälardalens högskola/Akademin för innovation, design och teknikAbstract : A problem with multi-core platforms is the competition of shared cache memory which is also knownas cache contention. Cache contention can negatively affect process reliability, since it can increaseexecution time jitter. Cache contention may be caused by inter-process interference in a system. READ MORE
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20. Design of Pacman with Debug Logic
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : This thesis work was performed at Ineda System Pvt Ltd, Hyderabad, India. Pacman is an interrupt controller, designed with the concept of priority based selection of peripherals with 16x8 input interrupt lines. READ MORE