RTL power estimation and optimization flow for 5G radio products

Abstract: Power reduction is becoming a critical design requirement for ASIC/SOC designers. Reducing both dynamic and leakage power is essential to meet power budgets for portable devices as well as to ensure that these ASICs meet their packaging and cooling costs. In addition, the power of an ASIC has a significant impact on its reliability and manufacturing yield. Also, low-power has become a leading design criterion for 5G Radio products that demand increasingly higher performance and lower energy footprint. Traditionally, most automated power optimization tools have focused on gate-level and physical level optimizations. However, major power reductions are only possible by addressing power at the RTL and system levels. At these levels, it is possible to make the sequential modifications needed to reduce power and energy consumption via techniques like sequential clock gating, power gating, frequency scaling, and other micro-architectural techniques. With the increasing requirement of low power design, estimating power consumption must be done early in the process and waiting until the netlist is available can be too late. Designers want to get an accurate power estimate at the RTL stage to shorten their design period. However, as there is no netlist available at RTL stage, the accuracy of the power estimated at the RTL stage may not be acceptable. This thesis begins with a review of several commonly used RTL PE methodologies, followed by the design of an automated RTL PE flow based on a commercially available EDA RTL power estimation tool, and finally, a sub-chip for a 5G device from Ericsson is used as the DUT to investigate the reasons for RTL PE inaccuracy and ways to improve the accuracies. The estimated power consumption from this RTL PE flow with and without calibration is compared with GL PE with front-end netlist and back-end netlist to identify the critical reason for RTL power estimation inaccuracy, and then a guideline for improving RTL PE accuracy is listed in the thesis’s result section.