Design of a power amplifier for NB-IoT

Abstract: An inverse class D power amplifier and a class A power amplifier are designed at schematic level for 20 dBm power class and NB-IoT specification in 65 nm CMOS technology. A suitable switch mode supply modulator is also designed. Three different efficiency enhancement techniques namely EER, Hybrid EER and ET are studied and the suitable transmitters are simulated for each in Cadence Virtuoso. These transmitters are compared with each other on the basis of output power, efficiency, and NB-IoT specifications of EVM and ACPR. The peak efficiency achieved by the supply modulator is 90%. The peak output power that can be achieved by ET, EER and hybrid EER is 24 dBm with efficiency of 37%, 28 dBm with an efficiency of 66% and 28 dBm with an efficiency of 66% respectively. It is also observed that, the low modulation bandwidth and relaxed specifications of NB-IoT standard, make EER architecture more tolerant to the delay mismatch between the envelope and phase path as compared to the other standards like 802.11a (Wi-Fi). With a delay of T/13, where T is the symbol duration, EER achieves a maximum power of 26 dBm while staying within limit of EVM and ACPR specified by NB-IoT. Thus, according to the analysis conducted in the report, EER with inverse class D amplifier proves to be the most promising architecture for NB-IoT specifications as compared to ET and hybrid EER architectures.