Essays about: "Phase Locked Loop"
Showing result 16 - 20 of 42 essays containing the words Phase Locked Loop.
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16. Ultra-stable frequency transfer using optical fibers
University essay from Lunds universitet/Atomfysik; Lunds universitet/Fysiska institutionenAbstract : A new era of precise time measurement came with the atomic clock. The technology is vital to navigations systems like GPS and to accurate physical measurements. READ MORE
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17. System Level Modeling and Verification of All-digital Phase-locked Loop
University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)Abstract : In wirelesscommunication systems, a local oscillator (LO) aims at demodulating radio-frequency signals into baseband signals. The performance of these signals determines the quality of communications which is highly affected by the phase accuracy of local oscillators. READ MORE
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18. Timing and Synchronization over Ethernet
University essay from Linköpings universitet/Institutionen för systemteknik; Linköpings universitet/Tekniska högskolanAbstract : In this thesis an investigation will be done on how time and frequency can be synchronized over Ethernet with help of Precision Time Protocol and Synchronous Ethernet. The goal is to achieve a high accuracy in the synchronization when a topology of 10 cascaded nodes is used. READ MORE
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19. Firmware Design and Implementation for a 14-bit Analog-to-Digital Converter to be used in the PANDA Experiment
University essay from Uppsala universitet/Institutionen för informationsteknologiAbstract : Development of the VHDL firmware for a high-speed Analogue to Digital Converter (ADC) is the focus of this paper, including writing, debug- ging and evaluation of said firmware. The finished version of the firmware is able to correctly convert analogue signals received by the ADC into their digital representations. READ MORE
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20. DLL Based Reference Multiplier for the use in a PLL for WLAN applications
University essay from Lunds universitet/Fysiska institutionenAbstract : This master’s thesis project report deals with the design of multiplier for the reference signal to the Phase Locked Loop (PLL) used in WLAN application. The reference multiplier designed is based on a newly proposed architecture of dual loop feedback Delay Locked Loop (DLL) in which multiplication is performed within the loops. READ MORE