Essays about: "power network on chip"
Showing result 1 - 5 of 41 essays containing the words power network on chip.
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1. Establishing High-Temperature Models for Leakage Current in Gated Lateral Bipolar Junction Transistors
University essay from Luleå tekniska universitet/Institutionen för teknikvetenskap och matematikAbstract : Power-efficient circuits are a vital step in moving towards a greener future. Battery life can get substantially improved by decreasing the amount of power a circuit needs. Lower power also leads to less excess heat generated. READ MORE
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2. Cost-Effective Design Solution for GAIM Shooting Trigger PCB & Improving the Power Distribution Network
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : Virtual Reality (VR) shooting simulators have gained popularity as effective training and entertainment tools. GAIM is a Swedish company specializing in VR shooting simulators, offering VR headsets with physical dummy guns and rifles. READ MORE
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3. Low-power Implementation of Neural Network Extension for RISC-V CPU
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Deep Learning and Neural Networks have been studied and developed for many years as of today, but there is still a great need of research on this field, because the industry needs are rapidly changing. The new challenge in this field is called edge inference and it is the deployment of Deep Learning on small, simple and cheap devices, such as low-power microcontrollers. READ MORE
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4. Low-power Acceleration of Convolutional Neural Networks using Near Memory Computing on a RISC-V SoC
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : The recent peak in interest for artificial intelligence, partly fueled by language models such as ChatGPT, is pushing the demand for machine learning and data processing in everyday applications, such as self-driving cars, where low latency is crucial and typically achieved through edge computing. The vast amount of data processing required intensifies the existing performance bottleneck of the data movement. READ MORE
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5. FPGA accelerated packet capture with eBPF : Performance considerations of using SoC FPGA accelerators for packet capturing.
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : With the rise of the Internet of Things and the proliferation of embedded devices equipped with an accelerator arose a need for efficient resource utilization. Hardware acceleration is a complex topic that requires specialized domain knowledge about the platform and different trade-offs that have to be made, especially in the area of power consumption. READ MORE
