Effects of Varying Precision on a FPGA using the SpMXV problem : A comparative study

Abstract: With Moore’s Law slowing down, designing computer hardware that keeps up with the performance demands is becoming increasingly difficult. An interesting area of research is the Field Programmable Gate Array (FPGA) which is a re-programmable hardware device, and which might not be as dependent on Moore’s Law as other hardware. In this study, we evaluated the FPGA by applying the Sparse Matrix Vector Multiplication (SpMXV) problem and observed how the performance was affected by varying levels of precision in the input. We created four implementations, each handling a specific precision of input, and measured their performance. Our results showed a general pattern partly in line with previous research where higher level of precision lead to higher accuracy, while only affecting execution time in specific cases. Furthermore, the floating point format was considerably more efficient than the fixed point formats in our implementation. In conclusion, there is a slight trade off when balancing precision and performance on a FPGA.