Essays about: "180 nm CMOS"

Found 1 essay containing the words 180 nm CMOS.

  1. 1. Power-Efficient Settling Time Reduction Techniques for a Folded-Cascode Amplifier in 1.8 V, 0.18 um CMOS

    University essay from Linköpings universitet/Elektroniska Kretsar och SystemLinköpings universitet/Tekniska fakulteten

    Author : Jimmy Johansson; [2017]
    Keywords : Folded-Cascode; Settling Time; Settling Time Reduction; Slew Rate; Slew Rate Enhancement; Operational Amplifier; Recycling Folded-Cascode; 180 nm CMOS; Test Buffer; Power-Efficient; Single-Stage Amplifier; Linear Settling Period; Slewing Period;

    Abstract : Testability is crucial in today’s complex industrial system on chips (SoCs), where sensitive on-chip analog voltages need to be measured. In such cases, an operational amplifier (opamp) is required to sufficiently buffer the signals before they can drive the chip pad and probe parasitics. READ MORE