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Showing result 11 - 15 of 16 essays matching the above criteria.
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11. Time-Multiplexed Channel Switches for Dynamic Frequency Band Reallocation
University essay from Linköpings universitet/DatorteknikAbstract : A partially parallel reconfigurable channel switch is constructed for use in DFBR. Its permutation can be changed while running without any interruption in the streams of data. Three approaches are tried: one based on asorting network, one based on memories and multiplexers and one based on a Clos network. READ MORE
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12. Adaptation of an ARM compatible System on chip as an IP-module in a FPGA
University essay from Institutionen för informationsteknologiAbstract : In the world of today a fast prototyping and low time to market are very important factors when developing products. Any effort to minimize these parameters as well as making systems easier to maintain is effort well placed. Syntronic is a consultant company dealing in electronic and software development, testing and maintenance. READ MORE
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13. Implementation of a VBR MPEG-stream receiver in an FPGA
University essay from Elektroniksystem; Tekniska högskolanAbstract : Nowdays, the transmission of digital TV-signals tends to move towards more untraditional medias, such as TCP/IP networks. This thesis focused on the problems involved in receiving MPEG transport streams of variable bitrate from a TCP/IP connection, such as jitter and clock synchronization. READ MORE
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14. Parameterizable Wishbone Bus
University essay from Institutionen för systemteknik; Tekniska högskolanAbstract : In the industry of intellectual property products "IP-cores", a communication link is almost always needed. A semiconductor intellectual property IP core is a reusable unit of logic in electronic design. IP cores are used as building blocks for ASIC chip design or FPGA logic designs. READ MORE
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15. Utilizing FPGAs for data acquisition at high data rates
University essay from Elektroniska komponenterAbstract : The aim of this thesis was to configure an FPGA with high speed ports to capture data from a prototype 4 bit ΣΔ analogue-to-digital converter sending data at a rate of 2.4 Gbps in four channels and to develop a protocol for transferring the data to a PC for analysis. READ MORE