Essays about: "High-Level Synthesis"

Showing result 6 - 10 of 55 essays containing the words High-Level Synthesis.

  1. 6. Benchmarking linear-algebra algorithms on CPU- and FPGA-based platforms

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Omar Askar Vergara; Karl Törnblom Bartholf; [2023]
    Keywords : FPGA; OpenCL; PolyBench; Cholesky; Durbin;

    Abstract : Moore’s law is the main driving factor behind the rapid evolution of computers that has been observed in the past 50 years. Though the law is soon ending due to heat- and sizing-related issues. One solution to continuing the evolution is utilizing alternative computer hardware, where parallel hardware is especially interesting. READ MORE

  3. 7. FPGA implementation of an undistortion model with high parameter flexibility and DRAM-free operation

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Zacharie McCormick; [2023]
    Keywords : FPGA; Computer Vision; Lens correction; Remapping; FPGA; Datorseende; Linskorrigering; Omvandling;

    Abstract : Computer Vision (CV) has become omnipresent in our everyday life and it’s starting to see more and more use in the industry. This movement creates a demand for ever more performant systems to keep up with the increasing demands in manufacturing speed and autonomous behaviours. READ MORE

  4. 8. A Study on Fault Tolerance of Object Detector Implemented on FPGA

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Tiancheng Yang; [2023]
    Keywords : Object detection; YOLO-v3-tiny; Fault tolerance; FPGA; VHDL; Hardware accelerator; Triple-modular redundancy; Time redundancy; Stuck-at-faults;

    Abstract : Objektdetektering har fått stort forskningsintresse de senaste åren, eftersom det är maskiners ögon och är en grundläggande uppgift inom datorseende som syftar till att identifiera och lokalisera föremål av intresse. Hårdvaruacceleratorer syftar vanligtvis till att öka genomströmningen för realtidskrav samtidigt som energiförbrukningen sänks. READ MORE

  5. 9. Develop a Graphical User Interface for the assembler for SiLago Platform

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Yuxuan Wang; [2023]
    Keywords : Graphic intermediate representation; Graphical analytic system; High-level synthesis tool; Grafisk mellanrepresentationen; Grafiskt analytiskt system; Högnivå syntes verktyg;

    Abstract : Vesyla-II is developed as the High-Level Synthesis (HLS) tool serving the SiLago platform. The assembler Manas is a part of the Coarse Grain Reconfigurable Architectures (CGRA) compiler in Vesyla-II, which is used to transform the information from source code into the target language. READ MORE

  6. 10. FPGA Accelerated Digital Image Correlation For Clamping Force Measurement

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : János Csanád Csuvarszki; [2023]
    Keywords : Digital image correlation; Field-programmable gate array; High-level synthesis;

    Abstract : Digital image correlation is a contactless optical method used for displacement and strain measurement which has become increasingly popular in the field of experimental mechanics. A specialized use case for the algorithm is to measure the clamping force in bolted joints, a crucial metric when considering the longevity and reliability of the constructs. READ MORE