Essays about: "MATRIX FPGA"

Showing result 1 - 5 of 11 essays containing the words MATRIX FPGA.

  1. 1. Effects of Varying Precision on a FPGA using the SpMXV problem : A comparative study

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Vendela Asplund; Martin Lindefors; [2023]
    Keywords : ;

    Abstract : With Moore’s Law slowing down, designing computer hardware that keeps up with the performance demands is becoming increasingly difficult. An interesting area of research is the Field Programmable Gate Array (FPGA) which is a re-programmable hardware device, and which might not be as dependent on Moore’s Law as other hardware. READ MORE

  2. 2. Evaluation of FPGA-based High Performance Computing Platforms

    University essay from Linköpings universitet/Datorteknik

    Author : Martin Frick-Lundgren; [2023]
    Keywords : FPGA; High performance computing; BUDE; GEMM; CPU; GPU;

    Abstract : High performance computing is a topic that has risen to the top in the era ofdigitalization, AI and automation. Therefore, the search for more cost and timeeffective ways to implement HPC work is always a subject extensively researched.One part of this is to have hardware that is capable to improve on these criteria. READ MORE

  3. 3. Design and Acceleration of Linear Integer System Solver on Programmable SoC

    University essay from Uppsala universitet/Institutionen för informationsteknologi

    Author : Jagadeep Ram Gandhi; [2019]
    Keywords : ;

    Abstract : A simple solver for linear integer systems is designed and accelerated on aCycloneV SoC chip that contains Cortex-A based MCU, programmable FPGA, andinter-connect bridges. The solver is designed based on the Gaussian Elimination method, where a system coefficient matric is converted to a Row-Echelon matrix and performing back Back-Substitution to solve system variables. READ MORE

  4. 4. One Million-Point FFT

    University essay from Linköpings universitet/Datorteknik

    Author : Tobias Mellqvist; Hans Kanders; [2018]
    Keywords : Large FFT; FFT; Cooley–Tukey; SDF; Binary tree; FPGA; triangular matrix;

    Abstract : The goal of this thesis has been to implement a hardware architecture for FPGA that calculates the fast Fourier transform (FFT) of a signal using one million samples. The FFT has been designed using a single-delay feedback architecture withrotators and butterflies, including a three-stage rotator with one million rotation angles. READ MORE

  5. 5. Design and verification of a USB 3.0 readout system for Timepix3 hybrid pixel detectors

    University essay from Mittuniversitetet/Avdelningen för elektronikkonstruktion

    Author : Till Dreier; [2018]
    Keywords : Hybrida pixeldetektorer; utläsningssystem; FPGA; Timepix;

    Abstract : This thesis describes the design, implementation, and verification of a USB 3.0 readout system for Timepix3 detectors. Timepix3 is a hybrid pixel detector consisting of a 256x256 pixel matrix with a 55 μm pitch and a timing resolution of 1.56ns. READ MORE