Essays about: "RTL code"

Showing result 11 - 15 of 21 essays containing the words RTL code.

  1. 11. Performance Evaluation of MathWorks HDL Coder as a Vendor Independent DFE Generation

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Elisabeth Pongratz; Roshan Cherian John; [2019]
    Keywords : MATLAB; Simulink; HDL Coder; XSG; DSPB; Technology and Engineering;

    Abstract : This thesis aims to evaluate MathWorks HDL (Hardware Descriptive Language) Coder and compare the results with designs produced by its vendor dependent counterparts. The focus is mainly on evaluate the design effort needed to close timing and to get optimal resource mapping for a selected design. READ MORE

  3. 12. Power-Aware Software Development For EMCA DSP

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Meishenglan Zhang; [2017]
    Keywords : ;

    Abstract : The advent of FinFET technology necessitates a shift towards early dynamic power awareness, not only for ASIC block designers but also for software engineers that develop code for those blocks. CMOS dynamic power is typically reduced by optimizing the RTL models in terms of switching activity and clock gating efficiency. READ MORE

  4. 13. Virtual Cycle-accurate Hardware and Software Co-simulation Platform for Cellular IoT

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Marcel Tovar Rascon; Patrik Elfborg; [2017]
    Keywords : co-simulation; cycle-accurate; ESL; HLS; SystemC; SoC Designer; IoT; SoC; FPGA; embedded; Technology and Engineering;

    Abstract : Modern embedded development flows often depend on FPGA board usage for pre-ASIC system verification. The purpose of this project is to instead explore the usage of Electronic System Level (ESL) hardware-software co-simulation through the usage of ARM SoC Designer tool to create a virtual prototype of a cellular IoT modem and thereafter compare the benefits of including such a methodology into the early development cycle. READ MORE

  5. 14. TLM-RTL Equivalence Automated Verification Method and Tool Evaluation : Performed in Ericsson AB

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Chencheng Zhang; [2015]
    Keywords : ;

    Abstract : Raising the abstraction level, from Register Transfer Level (RTL) to Transaction Level Model (TLM), accelerates the design and simulation speed for Application Specific Integrated Circuit (ASIC) design in modern industry. TLM can be used for reference model for RTL in verification process. READ MORE

  6. 15. High Level Synthesis Evaluation of Tools and Methodology

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Amir Namvar Gharehshiran; [2014]
    Keywords : ;

    Abstract : The advances in silicon technology, as well as competitive time to market, in the recent decade have forced the design tools and methodologies to progress towards higher levels of abstraction. Raising the level of abstraction shortens the design cycle via elimination of details in design specification. READ MORE