Essays about: "clock generation"

Showing result 11 - 15 of 22 essays containing the words clock generation.

  1. 11. How to Get the Most Out Of Your Embedded Hardware While Keeping Development Time to a Minimum : A Comparison of Two architectures and Two IDEs for Atmel AVR 8-bit Microcontrollers

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Niclas Arndt; [2014]
    Keywords : ;

    Abstract : This thesis aims to answer a number of basic questions about microcontroller development: • What’s the potential for writing more efficient program code and is it worth the effort? How could it be done? Could the presumed trade-off between code space and development time be overcome? • Which microcontroller hardware architecture should you choose? • Which IDE (development ecosystem) should you choose? This is an investigation of the above, using separate sets of incremental code changes (improvements) to a simple serial port communication test program. Two generations of Atmel 8-bit AVR microcontrollers (ATmega and ATxmega) and two conceptually different IDEs (BASCOM-AVR and Atmel Studio 6. READ MORE

  2. 12. Design and Simulation of Miscellaneous Blocks of an All-Digital PLL for the 60 GHz Band

    University essay from Elektroniksystem; Tekniska högskolan

    Author : Hadiyah Butt; Manjularani Padala; [2013]
    Keywords : ADPLL; PLL; DCO; TDC;

    Abstract : A phase-locked loop commonly known as PLL is widely used in communication systems. A PLL is used in radio, telecommunications, modulation and demodulation. It can be used for clock generation, clock recovery from data signals, clock distribution and as a frequency synthesizer. Most electronic circuits encounter the problem of the clock skew. READ MORE

  3. 13. Design of a DCO for an All Digital PLL for the 60 GHz Band : Design of a DCO for an All Digital PLL for the 60 GHz Band

    University essay from Elektroniksystem; Tekniska högskolan

    Author : Manikandan Balasubramanian; Saravana Prabhu Vijayanathan; [2013]
    Keywords : DCO; 65 nm; Oscillator; Varactor; Jitter; Differential to single; All-digital PLL; PLL;

    Abstract : The work was based on digitally controlled oscillator for an all-digital PLL in 65nm process. Phase locked loop’s were used in most of the application for clock generation and recovery as well. As the technology grows faster in the existinggeneration, there has to be quick development with the technique. READ MORE

  4. 14. DC to DC converter for smart dust

    University essay from Institutionen för systemteknik; Tekniska högskolan

    Author : Kashif Nisar; [2012]
    Keywords : Comparator; DC to DC converter; PWM; Op-amp; Voltage regulator;

    Abstract : This work describes the implementation of DC to DC converter for Smart Dust in 65 nm CMOS technology. The purpose of a DC to DC converter is to convert a battery voltage of 1 Vto a lower voltage of 0.5 V used by the processor. READ MORE

  5. 15. Oscillators with Constant Frequency over PVT

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Guodong Guo; [2012]
    Keywords : ;

    Abstract : This thesis is offered by Texas Instruments, Germany, aimed at designing an on-chip oscillator with constant frequency over process, voltage and temperature variation. RC relaxation oscillator is chosen to be the solution due to its small area and proper frequency accuracy. READ MORE