Essays about: "hardware description language"

Showing result 1 - 5 of 50 essays containing the words hardware description language.

  1. 1. FPGA Based Control of Multiple Electric Machines for Marine Propulsion Systems

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Simon Weideskog; [2024]
    Keywords : FPGA; Field Oriented Control; BLDC; SVPWM; SMO; Electric Drives; Electric Machines; Sliding Mode Observer; Marine Propulsion; Multiple Machines; Boat Motor; Fältorienterad styrning; marin framdrivning; elektriska drivsystem; elmaskiner; flertal maskiner; båtmotor;

    Abstract : This master thesis addresses the control of electric propulsion motors in a marine context. The focus lies mainly on the implementation of field oriented control (FOC) in a field programmable gate array (FPGA). The hypothesis is that FPGAs provide performance advantages over microcontroller-based control solutions by enabling parallel processing. READ MORE

  3. 2. FPGA programming with VHDL : A laboratory for the students in the Switching Theory and Digital Design course

    University essay from Högskolan i Halmstad

    Author : Samaneh Azimi; Safia Abba Ali; [2023]
    Keywords : FPGA Field-Programmable Gate Arrays VHDL Very High-Speed Integrated Circuits HDL Hardware description language LUT Look-up-table CLB Configurable Logic Blocks MUX Multiplexers IOB Input Output Blocks DUT Device under the test ASIC Application-specific integrated circuits SOC System on chips RTL Register Transfer Language;

    Abstract : This thesis aims to create effective and comprehensive learning materials for students enrolled in the Switching Theory and Digital Design course. The lab is designed to enable students to program an FPGA using VHDL in the Quartus programming environment to control traffic intersections with sensors and traffic signals. READ MORE

  4. 3. Wordlength inference in the Spade HDL : Seven implementations of wordlength inference and one implementation that actually works

    University essay from Linköpings universitet/Institutionen för systemteknik

    Author : Edvard Thörnros; [2023]
    Keywords : FPGA; spade; wordlength inference; word length; word-length; compiler; hdl; hardware description language; LUT; lookup tables; resource usage; compiler; FPGA; spade; ordlängdsinferens; kompilator; hdl; ordlängd;

    Abstract : Compilers, complex programs with the potential to greatly facilitate software and hardware design. This thesis focuses on enhancing the Spade hardware description language, known for its user-friendly approach to hardware design. READ MORE

  5. 4. Content assist in integrated development environments for hardware description languages

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : David Nadjar; [2023]
    Keywords : SystemVerilog; Content assist; Auto-completion; Hardware Development Language HDL ; Sigasi; Eclipse; Ordering; SystemVerilog; Content assist; Automatisk komplettering; Hårdvarubeskrivningsspråk HDL ; Sigasi; Eclipse; Ordning;

    Abstract : Content assist is one of the most powerful features in integrated development environments (IDE). While a lot of research papers exist on content assist for software programming languages (SPL), hardware description languages (HDL) aren’t covered at all. READ MORE

  6. 5. Low-power Acceleration of Convolutional Neural Networks using Near Memory Computing on a RISC-V SoC

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Kristoffer Westring; Linus Svensson; [2023]
    Keywords : FPGA; ASIC; Near Memory Computing; RISC-V; Convolutional Neural Network; Technology and Engineering;

    Abstract : The recent peak in interest for artificial intelligence, partly fueled by language models such as ChatGPT, is pushing the demand for machine learning and data processing in everyday applications, such as self-driving cars, where low latency is crucial and typically achieved through edge computing. The vast amount of data processing required intensifies the existing performance bottleneck of the data movement. READ MORE