Digital Predistortion for Broadcast FM repeaters
This thesis presents the design and implementation of a memoryless and adaptive digital predistorter used to linearize a power amplier. Specically, it deals with the implementation of a so-called constantgain predistorter, based on a lookup table, on a digital signal processing board built around an FPGA. The board also has two analog-to-digital converters, two digital-to-analog converters and a PIC microcontroller. By means of a high speed USB interface, input/output data to/from the system can be captured and sent to a PC. The adaptation of the constant-gain predistorter is implemented in Matlab by means of comparing the input and output data. When a new lookup table is ready, it is sent to the board for an update. By stimulating the system with a two-tone signal with center frequency of 162:5 MHzand tone spacing of1 MHz , the third order intermodulation product (IM3) was decreased by28 dB. By stimulating the system with an IS95 CDMA signal with center frequency of 162 :5 MHzand channel width of1:3 MHz , the power of the distortion right next to the channel edges were decreased by 24:7 dB.
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