Essays about: "Network on chip NOC thesis"

Showing result 6 - 10 of 19 essays containing the words Network on chip NOC thesis.

  1. 6. Analysing Real-Time Traffic in Wormhole-Switched On-ChipNetworks

    University essay from Mälardalens högskola/Inbyggda system

    Author : Taodi Wu; Shuyang Ding; [2016]
    Keywords : network-on-chip; wormhole switching; fixed-priority; round robin; schedula-bility analysis;

    Abstract : With the increasing demand of computation capabilities, many-core processors are gain-ing more and more attention. As a communication subsystem many-core processors, Network-on-Chip (NoC) draws a lot of attention in the related research fields. A NoC is used to deliver messages among different cores. READ MORE

  2. 7. Short Message Network-On-Chip Interconnect for ASIC

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Ejaz Sadiq; [2014]
    Keywords : ;

    Abstract : The rise of large scale integration has resulted in large number of processing elements/cores on a single ASIC. Thus an efficient interconnect scheme between the different processing elements and interfaces is required. Bus based interconnect poses problems such as non-scalability. READ MORE

  3. 8. Fuzzy Flow Regulation for Network-on-Chip based Chip Multiprocessors Systems

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Yuan Yao; [2014]
    Keywords : ;

    Abstract : As large uniprocessors are no longer scaling in performance, chip multiprocessors (CMP) become the mainstream to build high-performance computers. CMP chips integrate various components such as processing cores, L1 caches and L2 caches (some also contain L3 caches, for example, in the IBM Power7 multicore processor) together, and multiple CMP chips with external memory banks make up a CMP system. READ MORE

  4. 9. Fault-Tolerant Nostrum NoC on FPGA for theForSyDe/NoC System Generator Tool Suite

    University essay from KTH/Elektronik och Inbyggda System

    Author : Salvator Gkalea; [2014]
    Keywords : Fault-Tolerant; Nostrum; Network-on-Chip; FPGA; ForSyDe;

    Abstract : Moore’s law is the observation that over the years, the transistor density will increase,allowing billions of transistors to be integrated on a single chip. Over the lasttwo decades, Moore’s law has enabled the implementation of complex systems on asingle chip(SoCs). READ MORE

  5. 10. LNoC, Lagom Network On Chip - A thesis about network on chip and the design of a specification of a network on chip optimized for FPGAs called LNoC.

    University essay from Institutionen för datavetenskap

    Author : Robert Åkerblom-Andersson; [2013]
    Keywords : ;

    Abstract : This thesis presents a new network on chip (NoC) designed specifically to suit the growing FPGA market. Network on chip is the interconnect of tomorrow, as of writing this, traditional computer buses are still the most used type of interconnect technology. READ MORE