Essays about: "CPU Användning"

Showing result 11 - 15 of 51 essays containing the words CPU Användning.

1. 11. Improving relocation performance in ZGC by identifying the size of small objects

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Jinyu Yu; [2022]
   Keywords : Garbage Collector; Java; Data locality; Garbage Collector; Java; Datalokalitet;

   Abstract : Modern Garbage Collectors provide performance improvements by increasing program locality to utilize the faster CPU cache. A common approach is to move objects together according to the mutators’ access order, which brings more relocations during GC. READ MORE

3. 12. Predictive vertical CPU autoscaling in Kubernetes based on time-series forecasting with Holt-Winters exponential smoothing and long short-term memory

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Thomas Wang; [2021]
   Keywords : Kubernetes; Docker; Container; Cloud Native; Cloud Computing; Resource Provisioning; Autoscaling; Predictive scaling; CPU Usage; Seasonality; Exponential Smoothing; Long short-term memory; Time-series Analysis; Kubernetes; Docker; Container; Cloud Native; Cloud Computing; Resursförsörjning; Autoskalning; prediktiv skalning; CPU Användning; Säsongsmässighet; Exponentiell utjämning; långt korttidsminne; tidsserieanalys;

   Abstract : Private and public clouds require users to specify requests for resources such as CPU and memory (RAM) to be provisioned for their applications. The values of these requests do not necessarily relate to the application’s run-time requirements, but only help the cloud infrastructure resource manager to map requested virtual resources to physical resources. READ MORE

4. 13. SLAM Hardware & Software optimization for mobile platform integration

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Louis Muffang; [2021]
   Keywords : ;

   Abstract : This thesis work will focus on the optimization of a state-of-the-art monocular Visual-Inertial Odometry (VIO) algorithm for real-time application with limited resources on an embedded system. We will be using a multi-processor unit equipped with a Digital Signal Processor (DSP) to accelerate and offload tasks from the CPU. READ MORE

5. 14. Implementation of Low-Density Parity-Check codes for 5G NR shared channels

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Lifang Wang; [2021]
   Keywords : New radio NR ; Shared channel; Channel coding; Low-Density Parity-Check LDPC codes; Layered Normalized Min-Sum Algorithm LNMSA ; Layered Offset Min-Sum Algorithm LOMSA ; Ny radio NR ; Delad kanal; Kanalkodning; Paritetskontrollkoder med låg LDPC densitet; Layered Normalized Min-Sum Algorithm LNMSA ; Layered Offset Min-Sum Algorithm LOMSA ;

   Abstract : Channel coding plays a vital role in telecommunication. Low-Density Parity- Check (LDPC) codes are linear error-correcting codes. According to the 3rd Generation Partnership Project (3GPP) TS 38. READ MORE

6. 15. An Evaluation of Intel Cache Allocation Technology for Data- Intensive Applications

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Alan Ihre Sherif; [2021]
   Keywords : L3 cache; Last Level Cache; Intel Cache Allocation Technology; L3 Cache allocation; L3 cache performance improvement; Redis performance; Graph500 performance; bzip2 performance; L3-cache; Sista nivåns cache; Intel Cache Allocation Technology; L3 Cache-allokering; L3-cache prestandaförbättring; Redis prestanda; Graph500 prestanda; bzip2 prestanda;

   Abstract : On certain CPUs part of the Intel Xeon Scalable CPU family, the level three (L3) cache is shared among the CPU cores residing on the same CPU socket. This has benefits in that a larger and more scalable cache space is available to the CPU cores. READ MORE