Essays about: "Verilog"
Showing result 21 - 25 of 48 essays containing the word Verilog.
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21. A Reconfigurable Device for GALS Systems
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Globally Asynchronous Locally Synchronous (GALS) Field-Programmable Gate Array (FPGA) are composed of standard synchronous reconfigurable logic islands that communicate with each other via an asynchronous means. Past research into fully asynchronous FPGA has demonstrated high throughput and reliability adopting dual-rail encoding. READ MORE
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22. Evaluation of Cryptographic CRC in 65nm CMOS
University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)Abstract : With the rapid growth of Internet-of-Things (IoT), billions of devices are expected to be interconnected to provide various services appealing to users. Many devices will get an access to valuable information which is likely to increase the number of malicious attacks on these devices in the future. READ MORE
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23. Time-Multiplexed Channel Switches for Dynamic Frequency Band Reallocation
University essay from Linköpings universitet/DatorteknikAbstract : A partially parallel reconfigurable channel switch is constructed for use in DFBR. Its permutation can be changed while running without any interruption in the streams of data. Three approaches are tried: one based on asorting network, one based on memories and multiplexers and one based on a Clos network. READ MORE
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24. Implementation of an SDR in Verilog
University essay from Linköpings universitet/KommunikationssystemAbstract : This report presents an implementation of the software part in a software definedradio. The radio is not entirely implemented in software and therefore there arecertain limitations on the received signal. The parts implemented are oscillator,decimation filter, carrier synchronization, time synchronization, package detection,and demodulation. READ MORE
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25. Application Specific Instruction-set Processor Using a Parametrizable multi-SIMD Synthesizeable Model Supporting Design Space Exploration
University essay from Lunds universitet/Institutionen för datavetenskapAbstract : In this thesis, we provide a synthesizable model for supporting design space exploration of application-specific instruction-set processors. The model is written in a high-level of abstraction hardware description language Bluespec System Verilog and is parametrized to support different configurations for use in the design space exploration. READ MORE