Onboard computer fault-tolerance detection and mitigation

Abstract: The aim for this thesis is to design a software library responsible for preventing, detecting, handling and logging faults caused by radiation in a representable flight computer system based on the Cobham Gaisler GR740 quad-core LEON4FT processor chip. The LEON processor family is commonly used in space applications and it is based on the open SPARC instruction set and has been extended with fault tolerant features to cope with both on-chip radiation effects as well as upsets in external memory. The new GR740 device introduces a new computer architecture with multiple buses as compared to previous chips, Level-2 cache and a memory scrubber accelerating fault mitigation in external SDRAM memories. As the processor system design keeps getting more complex it also requires software to handle more hardware and new events, including central handling and logging routines of faults. The report describes the analysis performed to identify sources of faults and proposed suitable mitigation techniques, the established software requirements and how they are translated into a software architecture, then implemented and finally demonstrated on hardware. Along with this, it is shown how the developed demonstrator application software library can be integrated into the RTEMS real-time operating system commonly used in European space missions. The results are based on the demonstrator execution, and the results show that the software is functionally working and validates that the performance of the scrubber matches the derived scrubbing timings. After the project is completed, the software library design will be evaluated for use in Cobham Gaisler’s payload computer platform for the GOMX-5 mission. Radiation upsets will be emulated by injecting faults while running the developed API on demonstrator applications. Furthermore, implementation of software into NASA cFS/cFE will be analysed.