Essays about: "DIGITAL cmos DESIGN"
Showing result 1 - 5 of 55 essays containing the words DIGITAL cmos DESIGN.
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1. Current-Mode Class D Power Amplifier for 2.4GHz Wi-Fi
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Modern wireless communication techniques employed in the Wi-Fi® protocol, such as orthogonal frequency-division multiplexing exhibit analogue signals with high peak-to-average power ratio. Therefore, power amplifiers for Wi-Fi suffer from low efficiency when operating in back-off mode, away from their maximum efficiency at peak power. READ MORE
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2. Design of a Differential Cross-Coupled Power LC Oscillator with ASK Modulation
University essay from Linköpings universitet/Elektroniska Kretsar och SystemAbstract : Rapid growth in the field of communications industry has led to newer opportunities and challenges in the design of CMOS based monolithic integrated circuits. ASK modulators are a class of digital modulators which are known for their relative simplicity of implementation for low cost applications in the industrial and biomedical domains. READ MORE
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3. Design a Three-Stage Pipelined RISC-V Processor Using SystemVerilog
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : RISC-V is growing in popularity as a free and open RISC Instruction Set Architecture (ISA) in academia and research. Also, the openness, simplicity, extensibility, and modularity, among its advantages, make it more and more used by designers in industry. The aim of this thesis is to design an open-source RISC-V processor. READ MORE
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4. Configurable, scalable single-ended sense amplifier with additional auxiliary blocks for low-power two-port memories in advanced FinFET technologies
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : System on Chip (SoC) designs contain a variety of Intellectual Property (IP) cores, including digital signal processing blocks, media and graphics processing units, as well as processing core units that employ multiple-port memories to enhance performance and bandwidth. These memories allow parallel read/write operations from the same memory blocks from different ports. READ MORE
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5. A design of a 100 MS/s, 8-bit Pipelined ADC in CMOS
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : The thesis focuses on designing and simulating an 8-bit high-speed fully differential pipelined Analog to Digital Converter (ADC) in the 65nm Complementary Metal-Oxide-Semiconductor (CMOS) technology by using the software Cadence Virtuoso. The aim is to increase the operation speed of the ADC for communication systems without reducing the performance, in the meantime, the low power consumption and the low complexity should also be required when considering future implementation. READ MORE